While in general you can simply “ignore” whether or not you're running on
an SMP architecture or a single processor, there are certain things that
will bite you.
Unfortunately, they may be such low-probability events that they won't show up during
development but rather during testing, demos, or the worst: out in the field.
Taking a few moments now to program defensively will save problems down the road.
Here are the kinds of things that you're going to run up against on an SMP system:
- Threads really can and do run concurrently—relying
on things like FIFO scheduling or prioritization for synchronization is a
no-no.
- Threads and Interrupt Service Routines (ISRs) also do run concurrently—this
means that not only will you have to protect the thread from the ISR,
but you'll also have to protect the ISR from the thread.
See the Interrupts chapter for more details.
- Some operations that you'd expect to be atomic aren't, depending on the
operation and processor. Notable operations in this list are things that
do a read-modify-write cycle (e.g., ++, --,
|=, &= etc.). See the include file
<atomic.h> for replacements.
(Note that this isn't purely an SMP issue; most RISC processors don't necessarily
perform the above code in an atomic manner.)