struct armv_chip { unsigned cpuid; const char *name; unsigned mmu_cr_set; unsigned mmu_cr_clr; int cycles; const struct armv_cache *cache; const struct callout_rtn *power; const struct callout_rtn *flush; const struct callout_rtn *deferred; const struct armv_pte *pte; const struct armv_pte *pte_wa; const struct armv_pte *pte_wb; const struct armv_pte *pte_wt; void (*setup)(struct cpuinfo_entry *cpu, unsigned cpuid); const struct armv_chip *(*detect)(void); unsigned short ttb_attr; unsigned short pte_attr; };
The armv_chip structure describes the configuration for a particular CPU.
The ARMv7 processors use the WFI instruction to enter wait for interrupt mode.
To enable swap instructions, bit 10 (ARM_MMU_CR_F) must be set. In ARMv7, it's disabled by default, causing it to generate illegal instruction exceptions.
The members of the armv_chip structure include:
The armv_list[] array defined in armv_list.c contains a list of all supported CPUs, and the arm_chip_detect() function iterates through this array to match bits 15:0 of the ID register.
A BSP can override the library's armv_list.c to provide a customized list of supported CPUs, for example to specify armv_chip structures that aren't implemented in libstartup, or to restrict the list to the processor(s) implemented by the target board.
The flush callout is used to flush the cache and TLB when unmapping a page. This is called for each page in a region being unmapped.
The deferred callout is used after all pages in a region have been unmapped, and can be used to perform any actions that the flush callout didn't perform.
For example, if the MMU doesn't support flushing the instruction cache by virtual address, the deferred callout can be used to flush the instruction cache after all pages have been unmapped, to reduce the cost of flushing.
If you specify the -wa option, the pte_wa configuration is used. If the CPU doesn't support write-allocate caching, set pte_wa to 0, and the default pte values will be used instead.
If you specify the -wb compile option, the pte_wb configuration is used. If the CPU doesn't support write-back caching, set pte_wb to 0, and the default pte values will be used instead.
If you specify the -wt compile option, the pte_wt configuration is used. If the CPU doesn't support write-through caching, set pte_wt to 0, and the default pte values will be used instead.